Om Maheshwari

Om Maheshwari

Prime Minister's Research Fellow, Electrical Engineering, IIT Gandhinagar

Publications

Conferences

  • Om Maheshwari, N. Mohapatra. “Process-Performance Variability Modeling of Inner Spacer Etch in GAA FETs”, SISPAD, Grenoble France, 2025 (Accepted).

  • Om Maheshwari, P. Kumar, S. Barai, N. Mohapatra. “nanoPMC: A GPU- Accelerated Particle Monte Carlo Simulator for Feature-scale Semiconductor Process Modeling”, IMECE India, 2025 (Accepted).

  • Om Maheshwari, P. Kumar, S. Barai, N. Mohapatra. “From Variations to Precision: Modeling and Optimization of Inner Spacer Etch in GAA FETs”, SEMI ASMC, Albany USA, 2025, DOI: 10.1109/ASMC64512.2025.11010557.

  • Om Maheshwari, N. Mohapatra. “Enhanced ANN for Accurate Current Prediction and Circuit Simulation in Nanosheet FETs”, IEEE EDTM 2024, DOI: 10.1109/EDTM58488.2024.10511644.

  • A. Singh, Om Maheshwari, N. Mohapatra. “Dissecting Parasitic Capacitance in Nanosheet FETs: An Analytical Perspective”, IEEE EDTM 2024 DOI: 10.1109/EDTM58488.2024.10512230.

  • Om Maheshwari, A. Singh, N. Mohapatra. “Training Free Parameter Extraction for Compact Device Models using Sequential Bayesian Optimization”, IEEE EDTM 2024, DOI: 10.1109/EDTM58488.2024.10511311.

  • Om Maheshwari, D. Vyas, N. Mohapatra, K-means Clustering with ANN based Classification to Predict Current-Voltage Characteristics of Advanced FETs, VLSID 2024, DOI: 10.1109/VLSID60093.2024.00008.

  • Om Maheshwari, P. Kumar, S. Barai, N. Mohapatra, Feature Transformed ANN I-V and C-V model for Accurate Curve Prediction and Circuit Simulation of Nanosheet FET, IWPSD 2023.

  • Om Maheshwari, J. Cao, Y. Lee, M. Luisier and T. Agarwal, “Radio Frequency Performance of High Mobility 2D Monolayer Au2S-based Transistors,” IEEE EDTM 2023, Seoul, Korea, DOI: 10.1109/EDTM55494.2023.10103133.

  • Om Maheshwari, R. Katiyar, A. Dasgupta, A. Chakravorty, D. R. Nair and N.R. Mohapatra, “An Indigenous Low-Cost Robust BiCMOS Process Flow for NavIC Applications,” ICEE 2022, Bangalore, India, DOI: 10.1109/ICEE56203.2022.10118318, Received Best Paper Award.

Journals

  • A. Singh, J. Pal, Om Maheshwari, N. Mohapatra. “Comprehensive Study of Parasitic Capacitance in CFETs: An Analytical Perspective”, IEEE Transactions on Electron Devices, 2025, DOI: 10.1109/TED.2025.3585907.

  • Om Maheshwari, A. Singh, N. Mohapatra. “Training Free Parameter Extraction for Compact Device Models using Sequential Bayesian Optimization with Adaptive Sampling”, IEEE Transactions on Electron Devices, 2024, vol. 71, no. 12, pp. 7889-7895, Dec. 2024, DOI: 10.1109/TED.2024.3478177.

  • A. Singh, Om Maheshwari, N. Mohapatra. “Parasitic Capacitance in Nanosheet FETs: Extraction of Different Components and Their Analytical Modeling,” IEEE Transactions on Electron Devices, 2024, vol. 71, no. 5, pp. 2894-2900, May 2024, DOI: 10.1109/TED.2024.3382216.